Dynamic behavior of a Josephson latching comparator for use in a high-speed analog-to-digital converter

Abstract

A Josephson latching comparator for use in an analog-to-digital (A/D) converter has been designed and experimentally investigated. A novel on-chip waveform sampling system is presented; this was used to measure the dynamic behavior of a single comparator circuit. The circuits are fabricated with a modified lead-alloy process. Results obtained using this system are compared with simulations and the two are shown to be in good agreement. An A/D converter is proposed in which an array of comparators is used to-quantize rapidly changing input waveforms. A simple encoding scheme is presented which generates a natural-binary representation of the analog input.