IEEE Journal of Solid-State Circuits · 1982 · 66 citations · 5 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesAnalog Integrated CircuitsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyLow-noise Circuit DesignMixed-signal Integrated Circuit DesignNoise In Analog CircuitsAnalog Circuit DesignAnalog MultipliersCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Differential AmplifiersMultiplier Design
A four-quadrant NMOS analog multiplier, which achieves linearity better than 0.3 percent at 75 percent of full-scale swing, a bandwidth of DC to 1.5 MHz, and output noise 77 dB below full scale is described. Active area is 450 mils/SUP 2/.
5
A new wide-band amplifier technique
B. Gilbert · IEEE Journal of Solid-State Circuits · 1968 · 273 citations