Bit-stream signal processing and its application to communication systems

Hisato Fujisaka, M. Morisue, Masahiro Sakamoto, R. Kurata

IEE Proceedings - Circuits Devices and Systems · 2002 · 52 citations · 1 references

Concepts

TL;DR

The paper proposes a digital circuit technique that directly processes bit‑stream signals from sigma‑delta ADCs, introduces fundamental adder and multiplier modules, and demonstrates its use in a QPSK demodulator for communication systems. The method employs sigma‑delta bit‑streams processed by custom adders and multipliers, with up/down counters enabling additional modules such as oscillators, dividers, and square‑root circuits, and is implemented in a QPSK demodulator whose performance is analyzed through linear noise estimation. Processors built with these modules outperform conventional Nyquist‑rate designs by eliminating single‑bit/multibit converters, reducing routing area, and requiring fewer logic gates.

Abstract

The paper describes a digital circuit technique to process directly bit-stream signals from sigma–delta modulation based analogue-to-digital converters and the application of the technique to communication systems. The newly developed adder and multiplier are fundamental processing circuit modules. Using the fundamental modules and up/down counters, other circuit modules, such as oscillators, dividers and square root circuits, can also be realised. Signal processors built from the modules have three advantages over multi-bit Nyquist rate processors. First, single-bit/multibit converters are not needed at the inputs of the processors because the arithmetic modules directly process the bit-stream signals. Secondly, the physical areas for routing the signals among the circuit modules are small since they are in the form of a bit-stream. Thirdly, the processors are built from a smaller number of logic gates than conventional Nyquist rate processors because of the simple structure of the circuit modules. As an application of the technique to digital signal processing for communications, a QPSK demodulator is presented. In addition to circuit simulations of the demodulator, a useful linear analysis to estimate the influence of the noise components contained in the outputs from the circuit modules on the steady-state demodulation performance is explained.

References

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