Process variation in near-threshold wide SIMD architectures

TLDR

Near‑threshold operation combined with wide SIMD offers high energy efficiency for parallelizable workloads, but process variability causes delay variations that are amplified by the many critical paths in wide SIMD architectures. The study systematically investigates delay variations in near‑threshold wide SIMD systems. It demonstrates that structural duplication and supply‑voltage/frequency margining effectively mitigate timing variations with only marginal area and power overhead.

Abstract

Near-threshold operation has emerged as a competitive approach for energy-efficient architecture design. In particular, a combination of near-threshold circuit techniques and parallel SIMD computations achieves excellent energy efficiency for easy-to-parallelize applications. However, near-threshold operations suffer from delay variations due to increased process variability. This is exacerbated in wide SIMD architectures where the number of critical paths are multiplied by the SIMD width. This paper provides a systematic in-depth study of delay variations in near-threshold operations and shows that simple techniques such as structural duplication and supply voltage/frequency margining are sufficient to mitigate the timing variation problems in wide SIMD architectures at the cost of marginal area and power overhead.