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Network flow based circuit partitioning for time-multiplexed FPGAs
62
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1998
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Theory Of ComputingNetwork FlowsEngineeringAdvanced ComputingComputer EngineeringComputer ArchitectureNetworked Computer SystemsNetwork AnalysisNetwork ManagementComputer SciencesComputer ScienceReconfigurable ArchitectureNetwork FlowParallel ComputingInterconnection Network ArchitectureNetwork MonitoringFpga DesignTime-multiplexed Fpgas Authors
Article Free Access Share on Network flow based circuit partitioning for time-multiplexed FPGAs Authors: Huiqun Liu Department of Computer Sciences, University of Texas at Austin, TX Department of Computer Sciences, University of Texas at Austin, TXView Profile , D. F. Wong Department of Computer Sciences, University of Texas at Austin, TX Department of Computer Sciences, University of Texas at Austin, TXView Profile Authors Info & Claims ICCAD '98: Proceedings of the 1998 IEEE/ACM international conference on Computer-aided designNovember 1998 Pages 497–504https://doi.org/10.1145/288548.289077Published:01 November 1998Publication History 42citation351DownloadsMetricsTotal Citations42Total Downloads351Last 12 Months35Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
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