Skyrmion-skyrmion and skyrmion-edge repulsions in skyrmion-based racetrack memory

TLDR

Magnetic skyrmions, with their stability, nanoscale size, and low driving currents, are attractive for next‑generation magnetic memories and spintronic devices, especially in racetrack architectures where they encode data bits. The study numerically investigates how skyrmion‑skyrmion and skyrmion‑edge repulsions affect the feasibility of skyrmion‑based racetrack memory. We numerically model the spacing and adjustment of consecutive skyrmionic bits on a racetrack and propose a simple method to prevent clogging beyond the reading element. We observe clogging at the racetrack end that shrinks skyrmion size, but our proposed method eliminates bits beyond the reading element, providing guidance for future racetrack memory design.

Abstract

Magnetic skyrmions are promising for building next-generation magnetic memories and spintronic devices due to their stability, small size and the extremely low currents needed to move them. In particular, skyrmion-based racetrack memory is attractive for information technology, where skyrmions are used to store information as data bits instead of traditional domain walls. Here we numerically demonstrate the impacts of skyrmion-skyrmion and skyrmion-edge repulsions on the feasibility of skyrmion-based racetrack memory. The reliable and practicable spacing between consecutive skyrmionic bits on the racetrack as well as the ability to adjust it are investigated. Clogging of skyrmionic bits is found at the end of the racetrack, leading to the reduction of skyrmion size. Further, we demonstrate an effective and simple method to avoid the clogging of skyrmionic bits, which ensures the elimination of skyrmionic bits beyond the reading element. Our results give guidance for the design and development of future skyrmion-based racetrack memory.