Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs

Abstract

Article Free Access Share on Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs Authors: Byungil Jeong Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaView Profile , Sungjoo Yoo Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaView Profile , Sunghyun Lee Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaView Profile , Kiyoung Choi Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, Korea Design Automation Lab., School of Electrical Engineering, Seoul National University, Seoul 151-742, KoreaView Profile Authors Info & Claims ASP-DAC '00: Proceedings of the 2000 Asia and South Pacific Design Automation ConferenceJanuary 2000Pages 169–174https://doi.org/10.1145/368434.368598Published:28 January 2000Publication History 27citation217DownloadsMetricsTotal Citations27Total Downloads217Last 12 Months2Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Publisher SiteeReaderPDF