Two-Way Current-Combining $W$-Band Power Amplifier in 65-nm CMOS

Abstract

This paper presents a two-way current-combining-based <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> -band power amplifier (PA) in 65-nm CMOS technology. An analytical model and design method for <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> -band power combiners are presented, which indicates current combining is preferred for millimeter-wave frequencies due to a good current handling capability, symmetrical design, and low sensitivity to parasitics. To demonstrate the concept, a two-way current-combining-based PA has been fabricated, where each channel utilizes compact and symmetrical transformer-based inter-stage coupling to realize a preferred fully differential implementation. This PA operates from 101 to 117 GHz with maximum power gain of 14.1 dB, saturated output power ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</i> sat) of 14.8 dBm, and peak power-added efficiency of 9.4%. The core chip area without pads is 0.106 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .