A High-Linearity Low-Noise Amplifier with Variable Bandwidth for Neural Recoding Systems

Abstract

This paper describes a low-noise amplifier with multiple adjustable parameters for neural recording applications. An adjustable pseudo-resistor implemented by cascade metal–oxide–silicon field-effect transistors (MOSFETs) is proposed to achieve low-signal distortion and wide variable bandwidth range. The amplifier has been implemented in 0.18 µm standard complementary metal–oxide–semiconductor (CMOS) process and occupies 0.09 mm 2 on chip. The amplifier achieved a selectable voltage gain of 28 and 40 dB, variable bandwidth from 0.04 to 2.6 Hz, total harmonic distortion (THD) of 0.2% with 200 mV output swing, input referred noise of 2.5 µVrms over 0.1–100 Hz and 18.7 µW power consumption at a supply voltage of 1.8 V.