IEEE Micro · 1999 · 16 citations · 4 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureComputer GraphicsSystem-on-chip Design3D RenderingAccelerator ArchitectureComputer Graphics HardwareGraphics Processing Unit ArchitectureGraphics Processing UnitsHardware AccelerationAccelerator MicroarchitectureAcceleratorsGpu AcceleratorsGpu ArchitectureGpu MicroarchitectureGpu-based RenderingMultichip Modules
High-performance 3D graphics accelerators traditionally require multiple chips on multiple boards. In contrast, Neon-a single chip-performs like a multichip design, accelerating openGL 3D rendering and X11 and windows/NT 2D rendering.
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A parallel algorithm for polygon rasterization
Juan A. Pineda · ACM SIGGRAPH Computer Graphics · 1988 · 169 citations
The design and analysis of a cache architecture for texture mapping
Ziyad S. Hakura, Anoop Gupta · 1997 · 158 citations · Full text
A parallel algorithm for polygon rasterization
Juan A. Pineda · 1988 · 80 citations · Full text