IEEE Journal of Selected Topics in Quantum Electronics · 2012 · 197 citations · 11 references
EngineeringComputer EngineeringHigh-performance ComputingComputer NetworksOptoelectronicsPhotonicsInterconnect ArchitectureNetwork SwitchingOptical InterconnectsOptical SwitchingRoutingRouting ArchitectureArrayed Waveguide GratingsBuffer DesignBufferingData Center Optical InterconnectsEnd-to-end LatencyHigh-performance Computing SystemsOptical Interconnect ArchitecturesOptical Switches
This paper discusses the architecture of an arrayed waveguide grating router (AWGR)-based low-latency interconnect optical network switch called LIONS, and its different loopback buffering schemes. A proof of concept is demonstrated with a 4 × 4 experimental testbed. A simulator was developed to model the LIONS architecture and was validated by comparing experimentally obtained statistics such as average end-to-end latency with the results produced by the simulator. Considering the complexity and cost in implementing loopback buffers in LIONS, we propose an all-optical negative acknowledgement (AO-NACK) architecture in order to remove the need for loopback buffers. Simulation results for LIONS with AO-NACK architecture and distributed loopback buffer architecture are compared with the performance of the flattened butterfly electrical switching network.
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Cramming More Components Onto Integrated Circuits
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