Tunable Charge-Trap Memory Based on Few-Layer MoS₂

TLDR

Charge‑trap memory using high‑κ dielectrics and ultrathin 2D materials such as MoS₂ is a promising avenue for next‑generation nonvolatile memory devices. The study reports a dual‑gate charge‑trap memory device that incorporates a few‑layer MoS₂ channel and a 3D Al₂O₃/HfO₂/Al₂O₃ gate stack. The device employs a dual‑gate architecture with a few‑layer MoS₂ channel and a 3D Al₂O₃/HfO₂/Al₂O₃ charge‑trap stack. The MoS₂ memory exhibits an unprecedented >20 V window tunable from 15.6 to 21 V, a program/erase ratio of 10⁴ enabling multibit storage, and demonstrates hundreds of endurance cycles with only ~28 % charge loss after 10 years, outperforming prior MoS₂ flash memories.

Abstract

Charge-trap memory with high-κ dielectric materials is considered to be a promising candidate for next-generation memory devices. Ultrathin layered two-dimensional (2D) materials like graphene and MoS2 have been receiving much attention because of their fantastic physical properties and potential applications in electronic devices. Here, we report on a dual-gate charge-trap memory device composed of a few-layer MoS2 channel and a three-dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. Because of the extraordinary trapping ability of both electrons and holes in HfO2, the MoS2 memory device exhibits an unprecedented memory window exceeding 20 V. Importantly, with a back gate the window size can be effectively tuned from 15.6 to 21 V; the program/erase current ratio can reach up to 104, allowing for multibit information storage. Moreover, the device shows a high endurance of hundreds of cycles and a stable retention of ∼28% charge loss after 10 years, which is drastically lower than ever reported MoS2 flash memory. The combination of 2D materials with traditional high-κ charge-trap gate stacks opens up an exciting field of nonvolatile memory devices.