IEEE Journal of Solid-State Circuits · 2004 · 157 citations · 10 references
EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDifferential AmplifiersHigh-frequency Semiconductor DevicesResonant CircuitsCapacitanceCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Differential AmplifiersCmos Operational AmplifiersDifferential Amplifier StagesHigh-speed Differential AmplifiersNegative Capacitance Field-effect Transistors
A triple-resonance LC network increases the bandwidth of cascaded differential pairs by a factor of 2/spl radic/3, yielding a 40-Gb/s CMOS amplifier with a gain of 15 dB and a power dissipation of 190 mW from a 2.2-V supply. An ESD protection circuit employs negative capacitance along with T-coils and pn junctions to operate at 40 Gb/s while tolerating 700-800 V.
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A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier
Ren-Chieh Liu, Chin-Shen Lin, Kuo-Liang Deng et al. · 2003 · 86 citations