Jitter-limited photonic analog-to-digital converter with 7 effective bits for wideband radar applications

Abstract

A photonic analog-to-digital converter exploiting a sample time-interleaving approach is presented, showing more than 7 effective bits for input signals up to 40GHz and bandwidth up to 200MHz. The effective 1-to-4 optical sample parallelization scheme does not contaminate the low sampling jitter with limited crosstalk. A real-time digital post-processing is also added to increase the ADC linearity and to minimize the spurious tones induced by the digital data interleaving. The results show that the scheme is fundamentally limited by the sampling jitter and it approaches the theoretical limits for the considered signal frequencies. Discussions are also reported, demonstrating that the proposed photonic ADC can be upgraded to accept signals with larger bandwidth without performance reductions.