The Essence of Three-Phase PFC Rectifier Systems—Part I

TLDR

The paper aims to derive three‑phase PFC rectifier topologies from single‑phase designs, outline future research directions, and compare four candidate systems for industrial use. The authors classify the rectifiers into hybrid and fully active PWM boost‑ or buck‑type designs, describe their control concepts, and evaluate four systems using metrics such as semiconductor stress, component loading, EMI, efficiency, and power density. The study introduces a new Swiss Rectifier topology, clarifies the operating principles of three‑phase PFC rectifiers, and demonstrates prototype hardware achieving high efficiency and power density.

Abstract

In the first part of this paper, three-phase power factor correction (PFC) rectifier topologies with sinusoidal input currents and controlled output voltage are derived from known single-phase PFC rectifier systems and/or passive three-phase diode rectifiers. The systems are classified into hybrid and fully active pulsewidth modulation boost-type or buck-type rectifiers, and their functionality and basic control concepts are briefly described. This facilitates the understanding of the operating principle of three-phase PFC rectifiers starting from single-phase systems, and organizes and completes the knowledge base with a new hybrid three-phase buck-type PFC rectifier topology denominated as Swiss Rectifier. Finally, core topics of future research on three-phase PFC rectifier systems are discussed, such as the analysis of novel hybrid buck-type PFC rectifier topologies, the direct input current control of buck-type systems, and the multi-objective optimization of PFC rectifier systems. The second part of this paper is dedicated to a comparative evaluation of four rectifier systems offering a high potential for industrial applications based on simple and demonstrative performance metrics concerning the semiconductor stresses, the loading and volume of the main passive components, the differential mode and common mode electromagnetic interference noise level, and ultimately the achievable converter efficiency and power density. The results are substantiated with selected examples of hardware prototypes that are optimized for efficiency and/or power density.