Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design

Abstract

The increasing number of interconnect layers that are needed in a CMOS process to meet the routing and power requirements of large digital circuits also yield significant advantages for analog applications. The reverse thickness scaling of the top metal layer can be exploited in the design of low-loss transmission lines. Coplanar transmission lines in the top metal layers take advantage of a low metal resistance and a large separation from the heavily doped silicon substrate. They are therefore fully compatible with current and future CMOS process technologies. To investigate the feasibility of extending CMOS designs beyond 10 GHz, a wide range of coplanar transmission lines are characterized. The effect of the substrate resistivity on coplanar wave propagation is explained. After achieving a record loss of 0.3 dB/mm at 50 GHz, coplanar lines are used in the design of distributed amplifiers and oscillators. They are the first to achieve higher than 10 GHz operating frequencies in a conventional CMOS technology.