Integrated freestanding single-crystal silicon nanowires: conductivity and surface treatment

Abstract

Integrated freestanding single-crystal silicon nanowires with typical dimension of 100 nm × 100 nm × 5 µm are fabricated by conventional 1:1 optical lithography and wet chemical silicon etching. The fabrication procedure can lead to wafer-scale integration of silicon nanowires in arrays. The measured electrical transport characteristics of the silicon nanowires covered with/without SiO(2) support a model of Fermi level pinning near the conduction band. The I-V curves of the nanowires reveal a current carrier polarity reversal depending on Si-SiO(2) and Si-H bonds on the nanowire surfaces.