A Bidirectional TX/RX Four-Element Phased Array at 60 GHz With RF-IF Conversion Block in 90-nm CMOS Process

Abstract

A 60-GHz four-element bidirectional phased-array transmitter/receiver (TX/RX) chip with a two bit phase shifter (PS) and IF converter to/from 12 GHz, using a 90-nm CMOS process, is described. The array features 7-dB gain, measured noise figure of 9 dB, IPldB of -19 dBm for RX, and output Psat of +3.5 dBm for TX, drawing 60 mA from a 1.3-V supply. The rms amplitude and phase error of the PS is 0.7 dB and 2° max, respectively, from 57 to 66 GHz. This new architecture, together with the compact layout, decreases chip size by a factor of 2, compared to a separate TX and RX design. The use of passive PSs and combiners reduces the current consumption and minimizes temperature variation. An additional rms error of 0.3° and 0.07 dB was measured from 0°C to 80°C. Total die area is 1.6 × 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 1.6 × 0.65 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with and without an IF converter block, respectively. First pass success was achieved by the closed ground environment design methodology of the passive structures and by proper layout. To our knowledge, this is the first report on a bidirectional 60-GHz array with the lowest reported chip power consumption and size.