Interface states in polymer metal-insulator-semiconductor devices

Abstract

The admittance of polymer metal-insulator-semiconductor (MIS) capacitors has been measured as a function of frequency and applied voltage. The results reveal the presence of hole trapping states at the interface of the polysilsesquioxane insulator and the poly(3-hexylthiophene) semiconductor. The states appear to be distributed in two bands: one close to the equilibrium Fermi level at the semiconductor surface, the other ∼0.5eV above. Annealing the devices under vacuum for several hours at 90°C increases the concentration of the shallower traps to ∼3×1012cm−2eV−1, while decreasing the concentration of deep traps to ∼1×1010cm−2eV−1. Annealing improves the bulk hole mobility to ∼1×10−4cm2V−1s−1 while reducing the field-effect mobility in MIS field-effect transistors (FETs) slightly to ∼7×10−3cm2V−1s−1. Although the concentration of interface states is sufficiently great to account for gate-bias-induced threshold voltage instability in MISFETs, their associated time constants are much too short to explain the long term nature of the instability.