Stability of pentacene top gated thin film transistors

Abstract

We report on the stability of top gated pentacene field effect transistors processed on Kapton™ with Parylene-C as gate dielectric. The influence of bias stress and ambient atmosphere on device characteristics were investigated. Combined influence of moisture and gate bias stress led to an increase of depletion current and subthreshold slope as well as a drift of onset voltage and threshold voltage. We show that devices stressed in the off state exhibit a high stability.