Self Cascode: A Promising Low Voltage Analog Design Technique

Abstract

Two current mirror (CM) structures incorporating the self cascode (SC) technique for low voltage (LV) analog and mixed mode circuits are proposed. One CM is implemented by 4 MOSFETs, has output resistance of 0.3 M? and bandwidth of 1.2 GHz, while the other requires 8 MOSFETs, has output resistance of 15 M? and bandwidth of 1.1 GHz. Both can operate at ± 0.5 V. P-Spice simulations confirm the high performance of these CMs in comparison with the conventional and regulated structures.A small part of this paper is similar to the one that appeared in WASET-Vienna, Aug 13-15, 2008, Conference Proceedings