Multiphase digital pulsewidth modulator

Abstract

This letter describes a digital pulsewidth modulator that enables the generation of a large, adjustable number of pulsewidth modulated (PWM) outputs of programmable duty cycle and dead time, yet requiring just a small, fixed architecture. The design achieves a resolution of 255 ps using a composite PWM strategy that also minimizes clock frequency and area. It provides a practical solution to the problem of efficiently generating multiple high-resolution gate-drive signals and is particularly suited to the next generation of synchronously switched multiphase voltage regulator modules