TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection

TLDR

Hardware Trojans introduced in untrusted fabrication plants pose a major security threat, and while logic testing struggles to detect large sequential Trojans and side‑channel analysis is effective, its sensitivity drops with process variations or small Trojan size. The authors propose TeSR, a Temporal Self‑Referencing method that compares a chip’s signature at two time windows to eliminate process noise and achieve high detection sensitivity for Trojans of varying size. Unlike existing methods, TeSR does not require golden chip instances, relying solely on intra‑chip temporal comparisons. Simulations on three complex designs and three sequential Trojan circuits show TeSR’s effectiveness even under large inter‑ and intra‑die process variations.

Abstract

Malicious modification of integrated circuits, referred to as Hardware Trojans, in untrusted fabrication facility has emerged as a major security threat. Logic testing approaches are not very effective for detecting large sequential Trojans which require multiple state transitions often triggered by rare circuit events in order to activate and cause malfunction. On the other hand, side-channel analysis has emerged as an effective approach for detection of such large sequential Trojans. However, existing side-channel approaches suffer from large reduction in detection sensitivity with increasing process variations or decreasing Trojan size. In this paper, we propose TeSR, a Temporal Self-Referencing approach that compares the current signature of a chip at two different time windows to completely eliminate the effect of process noise, thus providing high detection sensitivity for Trojans of varying size. Furthermore, unlike existing approaches, it does not require golden chip instances as a reference. Simulation results for three complex designs and three representative sequential Trojan circuits demonstrate the effectiveness of the approach under large inter- and intra-die process variations.