2010 · 101 citations · 16 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsVlsi DesignCmos Circuit DesignDigital Logic DesignIntegrated Circuit DesignLeakage Power ReductionLow-power Digital Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsCmos Logic CircuitsCmos Logic DesignLogic Gate ImplementationLogic GatesLow-power Logic DesignPower Reduction TechniquesStatic Cmos LogicTemperature Corners
In this paper CMOS compatible Gate Diffusion Input (GDI) design technique is proposed. The GDI method enables the implementation of a wide range of complex logic functions using only two transistors. This method is suitable for the design of low-power logic gates, with a much smaller area than Static CMOS and existing PTL techniques. As opposite to our originally proposed GDI logic, the modified GDI logic is fully compatible for implementation in a standard CMOS process. Simulations of basic GDI gates under process and temperature corners in 40nm CMOS process are shown and compared to similar CMOS gates. We show that while having the same delay, GDI gates achieve leakage and active power reduction of up to 70% and 50%, respectively.
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Anantha P. Chandrakasan, R.W. Brodersen · 2015 · 2.2K citations
Engineering, Computer Engineering, Electrical Engineering +17