A 65nm CMOS 2.4GHz 31.5dBm power amplifier with a distributed LC power-combining network and improved linearization for WLAN applications

Abstract

A 2.4 GHz CMOS power amplifier with a distributed LC power-combining network and improved linearization for high-power WLAN applications is presented. With a 3.3 V supply the PA produces a saturated power of 31.5 dBm with peak PAE of 25 %. By utilizing multiple linearization techniques, an EVM of -25 dB is achieved at 25.5 dBm for the 2.4 GHz band. The PA occupies 2.7mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> in 65 nm CMOS.