Several schemes of alleviating bus voltage stress in single stage power factor correction converters

Abstract

High DC bus voltage stress is an important issue for the single stage PFC converters in practical application. This paper analyzes the inherent reason of the high bus voltage stress of single-stage power-factor-correction (PFC) AC/DC converters. Four possible resolving schemes are analyzed and discussed, and some of practical implementation circuits topologies are also given. Theoretical analysis and simulation results show that the both series-charging, parallel-discharging capacitors (SCPDC) scheme and bus-voltage-feedback (BVF) method are deemed to be more viable than the other two methods.