IEICE Electronics Express · 2011 · 11 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsField-programmable Gate ArraysReconfigurable ComputingDigital Signal ProcessingField-programmable Gate Array ArchitectureFpga ArchitecturePulse ProcessingRadar Signal ProcessingRadar SystemsDigital Pulse ProcessingDigital Signal Processing Block ArchitectureField-programmable Gate Arrays (Fpgas)Field-programmable Logic ArraysPulse CompressionRadar Hardware ArchitectureRadar ReceiversReceiver Design
The paper presents a digital pulse compression approach for high frequency (HF) chirp radar. The emphasis is to accomplish echo signal de-chirp operation by modified orthogonal transformation on field programmable gates array (FPGA) chip. This approach has been developed for an all-digital receiver platform which is directly radio frequency (RF) band-pass sampling, compared with the traditional analog receiver or intermediate frequency (IF) receiver, it has an easy hardware structure closing to a “soft” radar mode. The system closed-loop test shows the correctness and rationality of the design, meeting the demand of engineering application.
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M. E. Peters, Donald D. Blankenship, Sebastian Carter et al. · IEEE Transactions on Geoscience and Remote Sensing · 2007 · 175 citations