Resource-constrained loop list scheduler for DSP algorithms

Force-directed scheduling for the behavioral synthesis of ASICs

Pierre Paulin, J.P. Knight · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1989 · 1.1K citations

Engineering, Computer Engineering, Computer Science +16

The high-level synthesis of digital systems

M.C. McFarland, Alice C. Parker, Raúl Camposano · Proceedings of the IEEE · 1990 · 627 citations

Engineering, Computer Engineering, Computer Science +14

A formal approach to the scheduling problem in high level synthesis

C.-T. Hwang, J.-H. Lee, Yao‐Wen Hsu · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1991 · 433 citations

Computing, Computer Science, Algorithms +16

Sehwa: a software package for synthesis of pipelines from behavioral specifications

N. Park, Alice C. Parker · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1988 · 395 citations

Engineering, Computer Engineering, Computer Science +15

Static rate-optimal scheduling of iterative data-flow programs via optimum unfolding

Keshab K. Parhi, David G. Messerschmitt · IEEE Transactions on Computers · 1991 · 372 citations

Computing, Computer Engineering, Computer Science +13