Performance evaluation of MoS<inf>2</inf>-WTe<inf>2</inf> vertical tunneling transistor using real-space quantum simulator

Abstract

Layered two dimensional (2D) semiconductor materials enable vertical interlayer heterojunctions (HJ) without the requirement of lattice matching. Interlayer transport through a MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -WTe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> vertical HJ transistor is studied by atomistic quantum device simulations. Ultra-steep subthreshold slope (SS) is obtained due to the utilization of band filtering as the switching mechanism. The simulator enables the investigation of the effects of atomic defects and trapped charges on the performance of the atomically thin HT transistor. It is shown that the ultra-steep SS in TMD vertical tunneling FETs is robust against both atomic defects in the TMD layers and charged impurity scattering.