Implementing the Quantum von Neumann Architecture with Superconducting Circuits

M. Mariantoni, H. Wang, Tsuyoshi Yamamoto, M. Neeley, Radoslaw C. Bialczak, Yanbin Chen, M. Lenander, Erik Lucero, A. D. O’Connell, D. Sank,

Science · 2011 · 315 citations · 35 references

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Concepts

TL;DR

The von Neumann architecture for a classical computer comprises a central processing unit and a memory holding instructions and data. We demonstrate a quantum central processing unit that exchanges data with a quantum random‑access memory integrated on a chip, with instructions stored on a classical computer. We test our quantum machine by executing codes that involve seven quantum elements: two superconducting qubits coupled through a quantum bus, two quantum memories, and two zeroing registers. We demonstrate the quantum Fourier transform with 66 % process fidelity and a three‑qubit Toffoli‑class OR phase gate with 98 % phase fidelity, and show that, with longer qubit coherence, this approach could enable factoring and simple quantum error correction.

Abstract

The von Neumann architecture for a classical computer comprises a central processing unit and a memory holding instructions and data. We demonstrate a quantum central processing unit that exchanges data with a quantum random-access memory integrated on a chip, with instructions stored on a classical computer. We test our quantum machine by executing codes that involve seven quantum elements: Two superconducting qubits coupled through a quantum bus, two quantum memories, and two zeroing registers. Two vital algorithms for quantum computing are demonstrated, the quantum Fourier transform, with 66% process fidelity, and the three-qubit Toffoli-class OR phase gate, with 98% phase fidelity. Our results, in combination especially with longer qubit coherence, illustrate a potentially viable approach to factoring numbers and implementing simple quantum error correction codes.

References

35