A two-chip CMOS read channel for hard-disk drives

Abstract

Traditionally, the analog portion of disk-drive electronics is implemented in a high-performance bipolar technology. The authors demonstrate the feasibility of an all-CMOS solution with high-performance analog functions in 0.9- mu m CMOS to support data rates to 64 Mb/s. Reported CMOS supports a lower data rate. A typical block diagram of the analog portion of drive electronics includes the front-end pulse detector, data/clock recovery, and servo demodulator blocks. The data recovery and servo demodulator blocks have been demonstrated in a CMOS process. A programmable gain stage, filtering, and a pulse-detector supporting a 64-Mb/s data-rate read channel using 1,7 RLL code are described.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>