Concepedia

Abstract

A new A/D converter which includes a comparator, and a reversible binary counter with DC outputs has been designed, fabricated, and tested. The comparator generates two trains of the single-flux-quantum (SFQ) pulses in response to increasing or decreasing input signal. The pulses are transferred through SFQ transmission lines to the adding and diminishing inputs of a reversible counter. The reversible counter has been realized by supplementing the usual counter with the SFQ transmission lines, splitters; and confluence elements for sending diminished pulses directly to each bit. Nondestructive read-out of the counter contents is carried out by SFQ/DC converters connected to each counter bit. The integrated circuit is fabricated using 5- mu m Nb-AlO/sub x/-Nb Josephson junction technology with a critical current density about 500 A/cm/sup 2/. External Mo shunts of the junctions provide the value of beta /sub c/<or=1 and I/sub c/R approximately=300 mu V. The A/D conversion is studied for low-frequency signals with an external clock. High-frequency performance of the reversible counter has been tested.

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