Polysilphenylenesiloxane Resin as an Interlevel Dielectric for VLSI Multilevel Interconnections

Akira Oikawa, S. Fukuyama, Yasuhiro Yoneda, Hideki Harada, T. Takada

Journal of The Electrochemical Society · 1990 · 17 citations · 0 references

Concepts

Abstract

A new polysilphenylenesiloxane resin (SPS) has been developed for use as an interlevel dielectric for nonetch‐back applications in fabricating VLSI multilevel interconnections, and its properties have been studied. The oxidation temperature of SPS is 450°C, much higher than conventional silicone resins. The dielectric constant is 3.0, which is lower than conventional inorganic dielectrics. An 11.8% decrease of the interconnection delay is observed by using SPS as an interlevel dielectric. Degassing from the SPS is very low. SPS has good resistance to cracking. It does not crack even when it is 2.0 μm thick and heated to 400°C in air on aluminum topographic substrates. Its planarity is excellent. The 1 μm high topography is almost perfectly planarized for SPS 1.5 μm thick. The trilevel interconnection using SPS as an interlevel dielectric can be fabricated without etch back. Well‐planarized aluminum wiring patterns are obtained, vias are completely buried, and no cracks are found in the SPS layers.