IEEE Journal of Solid-State Circuits · 1990 · 26 citations · 7 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysMicroelectronicsDigital Signal ProcessingHardware AccelerationImage ProcessingLow-power Digital Circuit DesignNeural Signal ProcessingDigital Signal Processing Block ArchitectureDigital Signal Processing BlocksDynamic RangeLow-power Signal ProcessingPower-efficient DesignSignal Processing AcceleratorsTwo-layer Neural Computation
A generic large-coupled device (CCD) signal processor that performs 2.8-billion computations per second with a 10-MHz clock rate is described. The device's concept, design, operation, performance, and applications are reviewed. A dynamic range greater than 42 dB has been demonstrated by the device. This processor can be used as a one-dimensional correlator, a two-dimensional matched filter or a two-layer neural net device. The device demonstrates the flexibility and computational power that is possible using CCD technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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An introduction to computing with neural nets
Richard P. Lippmann · IEEE ASSP Magazine · 1987 · 7.9K citations
Parallel Networks that Learn to Pronounce English Text
Terrence J. Sejnowski · 1987 · 1.6K citations