High-performance GaAs heterojunction bipolar transistor monolithic logarithmic IF amplifiers

Abstract

Logarithmic IF amplifiers that implement both true and successive-detection designs are reported. Monolithically cascaded log gain stages are used to achieve piecewise-approximated logarithmic functions for the compression of signals over a wide dynamic range. The heterojunction bipolar transistor (HBT) IC fabrication process is based on a 3- mu m-emitter, self-aligned-base ohmic metal transistor using both molecular-beam epitaxy (MBE) and metal-organic metal vapor deposition (MOCVD) growth structures. The true log amp integrates four dual-gain (limiting and unity gain) stages without on-chip video detection. Its performance includes DC-3-GHz IF/video bandwidth, 400-ps rise time, <+or-dB log error over approximately=40-dB dynamic range at 3 GHz, and a tangential signal sensitivity (noise) of -60 dBm (test-set limited). The successive-detection log amp, designed for lower frequency and dynamic range applications, uses three limiting gain stages and four detector stages to achieve a 550-MHz bandwidth and <-0.34-dB log error over a 27-dB dynamic range. It is able to process 13-ns pulses with 5.0-ns and 5.2-ns risetimes and fall times, respectively.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>