A solid state variable capacitor with minimum DC capacitance

Abstract

A new solid state variable capacitor (SSVC) with minimum dc capacitance is proposed. A variable ac capacitor (with capacitance variable from 0 to C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ac</sub> ) is traditionally implemented by an H-bridge inverter and a large electrolytic dc capacitor with capacitance of 20 times the ac capacitance value, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ac</sub> to absorb the 2ω dc ripple. The proposed SSVC consists of an H-bridge and an additional phase leg connected to an ac capacitor with fixed capacitance, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ac</sub> and can reduce the dc capacitance to the minimum just for absorbing switching ripples. The fixed ac capacitor controlled by the additional phase leg absorbs the 2ω component and theoretically can eliminate 2ω ripples to the dc capacitor completely. Therefore, no electrolytic capacitors would be needed. Theoretical analysis of the SSVC is provided. Simulation and experimental results are shown to prove the effectiveness of the proposed SSVC with minimum dc capacitance.