A programmable 8-bit, 10MHz BW, 6.8mW, 200MSample/sec, 70dB SNDR VCO-based ADC using SC feedback for VCO linearization

Abstract

A low power linearized 8-bit VCO-based ADC is presented. The proposed ADC employs a differential VCO coupling technique to enhance the VCO time resolution and a linearization switched capacitor feedback loop for improving the SNDR and VCO linearity. The loop added the programmability property to the ADC performance. The 200MSample/sec ADC was implemented in 130nm CMOS process showing an SNR/SNDR ranging from 91.4/88.3dB to 54.3/41.2dB for an input bandwidth of 500kHz-100MHz while consuming a total of 6.78mW from a 1.2V supply. The process insensitive linearization loop improves the VCO linearity from 2% to 0.17%.