Design issues on high-speed high-resolution track-and-holds in BiCMOS technology

Abstract

The authors address some fundamental issues in track-and-hold (T&H) design. A number of explicit expressions characterising the main limitations of this class of circuits are given. A fully differential open-loop T&H is presented satisfying the stringent specifications imposed by present telecom applications. It exhibits high-resolution (12 bit) and high-speed (fck = 160 MHz) as measured on samples integrated in a standard 0.8 µm 12-GHz BiCMOS technology. The overall performance is beyond state-of-the-art. The T&H's size is 0.37 mm2, and it consumes 45 mA from a 5 V power supply.