2013 · 16 citations · 0 references
Hardware ModelingEngineeringHardware Verification LanguageVerificationComputer ArchitectureSoftware EngineeringSystem-level DesignSoftware Hardware Co-simulationNew Design PlatformSoftware AnalysisFormal VerificationHardware SecuritySafety-critical SystemReliability EngineeringSystems EngineeringCritical SystemSoftware ProtectionNovel SoftwareHardware-in-the-loop SimulationSoftware System SafetyComputer EngineeringComputer ScienceSoftware DesignSafety EngineeringFault InjectionHardware EmulationProgram AnalysisSoftware TestingFunctional SafetySystem Software
This paper introduces a novel software and hardware co-design flow using a co-simulator and a co-verifier platform. In the new design platform, different hardware failures can be injected automatically to test the software protection on potential unsafe behavior of the hardware. The structure of the system is introduced in part II of this paper. In part III&IV, we take a simple circuit as an example to show how we setup the components' model and how our simulation system works. And at last, we make a conclusion on the system, also the problems and challenges we are facing.