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16-Qubit Quantum-Computing Emulation Based on High-Speed Hardware Architecture
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2003
Year
Quantum CompilersEngineeringQuantum ComputingPhysicsQuantum Optimization AlgorithmNatural SciencesQuantum AlgorithmComputer EngineeringProbability Amplitudes16-Qubit Quantum-computing EmulatorQuantum DevicesQuantum Network16-Qubit Quantum-computing EmulationQuantum EntanglementHigh SpeedQuantum Error CorrectionQuantum HardwareQuantum Algorithms
A 16-qubit quantum-computing emulator executing quantum algorithms at high speed is proposed. By limiting the command of the quantum computing emulator to the minimum function required with the quantum algorithm, probability amplitudes are expressed with one bit and the functions of many qubits are integrated on a field programmable gate array (FPGA). As a result of implementing the emulator in the FPGA, it is found that the emulator has a 250 times higher-speed as compared with a software simulation by a general-purpose processor.