An FPGA implementation of a brushless DC motor speed controller

Abstract

The spreading of brushless DC (BLDC) motors has imposed the need for efficient and low cost motor control drives. In this paper, a low cost digital controller is presented. For experimental testing, the controller is implemented inside a field programmable gate array (FPGA) device. The developed design is validated in a modular fashion by logic simulation and experimental results are provided. The main contribution is the presented controller design methodology for FPGA implementation.