Space Vector Modulation with DC-Link Voltage Balancing Control for Three-Level Inverters

Abstract

The DC-link voltage balancing scheme for three-level inverter is proposed in this paper. Dependence of the DC-link capacitor voltage deviation on DC-link current and inverter switching states is established for proposed three-level inverter. Pulse pattern rearrangements for space vector PWM (SVPWM) using degree of freedom available in choice of redundant space vectors, sequencing of vectors, and splitting of duty cycles of vector are best exploited. Self neutral-point voltage deviation control in feed forward and simplified closed loop scheme are proposed in this paper. The effectiveness of proposed scheme is verified by computer simulations.