Hitting the Memory Wall: Implications of the Obvious

Abstract

This brief note points out something obvious--- something the authors "knew" without really understanding. With apologies to those who did understand, we offer it to those others who, like us, missed the point. We all know that the rate of improvement in microprocessor speed exceeds the rate of improvement in DRAM memory speed--- each is improving exponentially, but the exponent for microprocessors is substantially larger than that for DRAMs. The difference between diverging exponentials also grows exponentially; so, although the disparity between processor and memory speed is already an issue, downstream someplace it will be a much bigger one. How big and how soon? The answers to these questions are what the authors had failed to appreciate. To get a handle on the answers, consider an old friend--- the equation for the average time to access memory, where t c and t m are the cache and DRAM access times and p is the probability of a cache hit: We want to look at how the average access time changes with technology, so we'll make some conservative assumptions; as you'll see, the specific values won't change the basic conclusion of this note, namely that we are going to hit a wall in the improvement of system performance unless something basic changes. t_avg p t c 1 p-- ( ) t