65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ

Abstract

Today, measurement of 65 nm CMOS technology demonstrates Ft around 200 GHz and Fmax higher than 250 GHz as stated in G. Dambrine et al. (2005), which are clearly comparable to advanced commercially available 100 nm III-V HEMT or state-of-the-art SiGe HBT based in P. Chevalier et al. (2004). This increase allows new millimeter wave (MMW) applications on silicon. One of the success keys is then the passive integration. In this paper, on-chip microstrip and coplanar waveguide, which have been achieved in STMicroelectronics 65 nm RF CMOS bulk (p=20 mOmegamiddotcm) and HR SOI (p> 1kOmegamiddotcm) processes, were characterized up to 220 GHz. In addition, active device performances are reviewed. Then, circuit examples are given up to 220 GHz. Finally, a benchmarking with state of the art Si, III-V and HR SOI comparable transmission lines (TLs) structures is proposed