Millimeter-wave CMOS design

TLDR

The paper proposes a methodology for designing and modeling millimeter‑wave CMOS transistors, passives, and amplifiers, aiming to achieve high‑frequency performance in a standard 130‑nm bulk‑CMOS process. The authors develop accurate modeling techniques for active and passive mm‑wave components, introduce the inductive quality factor Q_L as a metric, and apply these methods to design wideband amplifiers in a 130‑nm CMOS process. The study achieves a peak fmax of 135 GHz, shows that CPW lines have higher Q_L than microstrip, and demonstrates two fabricated amplifiers with 19 dB gain at 40 GHz and 12 dB gain at 60 GHz, confirming that complex mm‑wave circuits are feasible in mainstream CMOS.

Abstract

This paper describes the design and modeling of CMOS transistors, integrated passives, and circuit blocks at millimeter-wave (mm-wave) frequencies. The effects of parasitics on the high-frequency performance of 130-nm CMOS transistors are investigated, and a peak f/sub max/ of 135 GHz has been achieved with optimal device layout. The inductive quality factor (Q/sub L/) is proposed as a more representative metric for transmission lines, and for a standard CMOS back-end process, coplanar waveguide (CPW) lines are determined to possess a higher Q/sub L/ than microstrip lines. Techniques for accurate modeling of active and passive components at mm-wave frequencies are presented. The proposed methodology was used to design two wideband mm-wave CMOS amplifiers operating at 40 GHz and 60 GHz. The 40-GHz amplifier achieves a peak |S/sub 21/| = 19 dB, output P/sub 1dB/ = -0.9 dBm, IIP3 = -7.4 dBm, and consumes 24 mA from a 1.5-V supply. The 60-GHz amplifier achieves a peak |S/sub 21/| = 12 dB, output P/sub 1dB/ = +2.0 dBm, NF = 8.8 dB, and consumes 36 mA from a 1.5-V supply. The amplifiers were fabricated in a standard 130-nm 6-metal layer bulk-CMOS process, demonstrating that complex mm-wave circuits are possible in today's mainstream CMOS technologies.