NbSi Barrier Junctions Tuned for Metrological Applications up to 70 GHz: 20 V Arrays for Programmable Josephson Voltage Standards

Abstract

PTB started using the robust Nb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> barrier junction technology for the fabrication of large arrays for the Programmable Josephson Voltage Standard (PJVS) and for the Josephson Arbitrary Waveform Synthesizer 3 years ago. We demonstrate how Nb-doping of the amorphous Si barrier causes the transition from an underdamped to a desired overdamped junction behavior. Special dc SQUIDs have been used to evaluate junction capacitance and noise properties. The critical current of small junctions as a function of applied magnetic field has been investigated. On the basis of an existing 70 GHz design previously used for 10 V PJVS chips, we fabricated for the first time 20 V circuits with nearly 140 000 double-stacked Josephson junctions. A direct on-chip comparison between the two 10 V halves of the binary-divided array confirmed the metrological suitability of the 20 V circuits for dc and ac applications.