Very low-voltage (0.8 V) CMOS receiver frontend for 5 GHz RF applications

Abstract

A fully integrated low-voltage RF receiver front end for 5 GHz radio applications, implemented in a standard 0.18 μm CMOS technology, is presented. The receiver consists of a differential low noise amplifier, an active mixer, and a quadrature voltage-controlled oscillator. The complete receiver is packaged in a standard 24-pin ceramic flat pack and consumes 56 mW from a 0.8 V supply. Measurement results show that the receiver has an overall noise figure of 7 dB, a −1 dBm input-referred IIP3, and 22 dB of image rejection. A stand-alone single-ended version of the LNA is also presented. Simple mechanisms for tuning the gain and the centre frequency of the LNA are proposed. With a supply voltage of 1 V, the LNA provides a power gain of 13.2 dB, has a noise figure of 2.5 dB, and over 10 dB of gain control and 360 MHz of frequency tuning. The LNA still operates well from a supply voltage as low as 0.7 V, providing a power gain of 7 dB.