Source Engineering for Tunnel Field-Effect Transistor: Elevated Source with Vertical Silicon–Germanium/Germanium Heterostructure

Abstract

In this work, we demonstrate by simulation and experiment that the performance of a p + Si 0.5 Ge 0.5 source tunnel field-effect transistor (TFET) can be improved by inserting an undoped Ge layer between source and channel. The Ge layer suppresses diffusion of boron into the Si channel and it also forms a Si 0.5 Ge 0.5 /Ge/Si hole quantum well, leading to an abrupt boron profile and a high hole concentration at the source edge. At the Ge/Si heterojunction, the presence of compressive strain in the Ge layer increases the valence band offset, while the tensile strain in the Si channel increases the conduction band offset, which effectively reduces the tunnel barrier and enhances the tunnel probability. Compared with a control device without the Ge layer, TFETs with a Si 0.5 Ge 0.5 /Ge source show a higher on-state current I ON and improved threshold voltage V TH and subthreshold characteristics.