Publication | Closed Access
A wafer scale integration neural network utilizing completely digital circuits
33
Citations
0
References
1989
Year
EngineeringDevice IntegrationNeural NetworkEducationIntegrated CircuitsNeurochipWafer Scale ProcessingSilicon WaferIntegrated Circuit DesignIntegrated TechnologyWafer Scale IntegrationNeuromorphic EngineeringElectronic CircuitElectrical EngineeringComputer EngineeringDigital CircuitsMicroelectronicsCircuit DesignVlsiBrain-like ComputingTechnology
A wafer scale integration (WSI) neural network utilizing completely digital circuits is reported. Three new technologies are used: (1) time-sharing digital bus; (2) efficient utilization of weight storage; and (3) redundant learning control circuit. Items 1 and 2 enable more than 500 neurons and effectively more than 30000 synapses to be fabricated on a 5-in silicon wafer. Item 3 enables a very high yield to be realized on one silicon wafer using a 0.8 mu m CMOS process.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>