A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

Abstract

This paper presents an ultra low voltage (ULV), ultra low power (ULP) and ultra wideband CMOS low noise amplifier with noise cancelling. A design methodology for optimizing the trade-off between power consumption and RF performance for a MOS transistor is employed. A current-reuse technique is used to lower the power consumption, and an inductive g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> -boosting technique is exploited to increase the gain and improve input matching at high frequencies. The circuit is implemented in a 90nm TSMC CMOS technology. Simulation results demonstrate a 15dB gain, a 6.8GHz bandwidth and a 4.5-5.3dB noise figure. The power consumption is only 410μW at a 0.4V supply.